TH7834C Datasheet, PDF (9/13 Pages) ATMEL Corporation – Very Highresolution Linear CCD Image Sensor (12000 Pixels)

TH7834C
Table 4. Drive Clock Capacitances Operating Frequencies⁽¹⁾
Symbol
Function/Clock
Capacitive Network
Φ_L1, Φ_L2
Register Main Transport Clock
ΦL1
ΦL2
160pF
250pF
320pF
Total
Φ_L1: 570 pF
Φ_L2: 640 pF
for one CCD⁽¹⁾
Max. Frequency
10 MHz
Φ_LS1-2, Φ_LS3-4
Register End Transfer Clock
≤ 50 pF per phase
10 MHz
Φ_P1-2, Φ_P3-4
Transfer Clock
Φ_A1-2, Φ_A3-4
Antiblooming And Exposure
Time Control
Φ_R1-2, Φ_R3-4
Reset Clock
Note: 1. For ¼ of total CCD register.
ΦP
15pF 15pF
VST
ΦL2 ^{80 pF per phase}
50pF
VSS
15pF
ΦA
VST _{100 pF per phase}
60pF
VSS
≤ 50 pF per phase
Pulse duration ≥ 2 µs
Period: ≥ 608.6 µs
(4 outputs mode)
10 MHz
Table 5. Static and Dynamic Electrical Characteristics
Value
Parameter
Symbol
Min.
Typ.
Max.
Unit
Remarks
DC Output Level (Pins: 1, 28, 29, 56)
V_ref
Output Impedance (Pins: 1, 28, 29,
56)
Z_S
10
V
400
600
Ω
Maximum Data Output Frequency
Per Channel
F_S max
5
10
MHz
(Note:)
Input Current On Active Pins 4, 6, 7,
8, 10, 11, 12, 13, 16, 17, 18, 19, 21,
23, 32, 34, 35, 36, 38, 39, 40, 41, 44,
I_e
45, 46, 47, 49, 51
<< 1
2
V_in = 15V
µA
with all other
pins = 0V
Amplifier Drain Supply Current (Per
V_DD)
I_DD1-2, I_DD3-4
10
16
mA
Static Power Dissipation (Per V_DD)
P_D1-2, P_D3-4
165
240
mW
Note: The maximum clock frequency is limited by the dark signal increase. Full performance for 5 MHz.
V_DD = 15V
9
1997A–IMAGE–05/02