AT24C1024SC_14 Datasheet, PDF (9/14 Pages) ATMEL Corporation – Schmitt Triggers, Filtered Inputs for Noise Suppression

Figure 10. Page Write
MOST SIGNIFICANT
LEAST
SIGNIFICANT
AT24C1024SC
P₀
L
S
B
The lower eight data word address bits are internally incremented following the receipt
of each data word. The higher data word address bits are not incremented, retaining the
memory page row location. When the word address, internally generated, reaches the
page boundary, the following byte is placed at the beginning of the same page. If more
than 256 data words are transmitted to the EEPROM, the data word address will “roll
over” and previous data will be overwritten. The address “roll over” during write is from
the last byte of the current page to the first byte of the same page.
ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-
ing a start condition followed by the device address word. The read/write bit is
representative of the operation desired. Only if the internal write cycle has completed
will the EEPROM respond with a “0”, allowing the read or write sequence to continue.
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5045A–SEEPR–04/04