AT24C1024SC_14 Datasheet, PDF (5/14 Pages) ATMEL Corporation – Schmitt Triggers, Filtered Inputs for Noise Suppression

Device Operation
AT24C1024SC
CLOCK AND DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL-low time periods (see
Figure 5 on page 6). Data changes during SCL-high periods will indicate a start or stop
condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
that must precede any other command (see Figure 6 on page 7).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (Figure 6 on page 7).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to
acknowledge that it has received each word.
STANDBY MODE: The AT24C1024SC features a low-power standby mode that is
enabled upon power-up and after the receipt of the stop bit and the completion of any
internal operations.
MEMORY RESET: After an interruption in protocol, power loss, or system reset, any
two-wire part can be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition as SDA is high.
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5045A–SEEPR–04/04