AT24C1024SC_14 Datasheet, PDF (8/14 Pages) ATMEL Corporation – Schmitt Triggers, Filtered Inputs for Noise Suppression

Device Addressing
The 1024K EEPROM requires an 8-bit device address word following a start condition to
enable the chip for a read or write operation (see Figure 8). The device address word
consists of a mandatory “one, zero” sequence for the first four most significant bits as
shown. This is common to all two-wire EEPROM devices.
The next three bits of the device address word are unused. These three unused bits
should be set to “0”.
The seventh bit (P₀) of the device address is a memory page address bit. The memory
page address bit is the most significant bit of the data word address that follows.
The eighth bit of the device address is the read/write operation select bit. A read opera-
tion is initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a “0”. If a compare is
not made, the device will return to a standby state.
Figure 8. Device Address
1 0 1 0 0 0 P₀ R/W
MSB
LSB
Write Operations
BYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word
address. The word address field consists of the P ₀ bit of the device address, then the
most significant word address followed by the least significant word address (see Figure
9).
A write operation requires the P ₀ bit and two 8-bit word addresses following the device
address word and acknowledgment. Upon receipt of this address, the EEPROM will
again respond with a “0” and then clock in the first 8-bit data word. Following receipt of
the 8-bit data word, the EEPROM will output a “0”. The addressing device, such as a
microcontroller, then must terminate the write sequence with a stop condition. At this
time the EEPROM enters an internally-timed write cycle, t_WR, to the nonvolatile memory.
All inputs are disabled during this write cycle and the EEPROM will not respond until the
write is complete (see Figure 9).
Figure 9. Byte Write
MOST SIGNIFICANT
LEAST
SIGNIFICANT
P0
PAGE WRITE: The 1024K EEPROM is capable of 256-byte page writes.
A page write is initiated the same way as a byte write, but the microcontroller does not
send a stop condition after the first data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcontroller can transmit up to 255
more data words. The EEPROM will respond with a “0” after each data word received.
The microcontroller must terminate the page write sequence with a stop condition (see
Figure 10).
8 AT24C1024SC
5045A–SEEPR–04/04