AT24C1024SC_14 Datasheet, PDF(6/14 Page) ATMEL Corporation – Schmitt Triggers, Filtered Inputs for Noise Suppression

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AT24C1024SC_14 Datasheet, PDF (6/14 Pages) ATMEL Corporation – Schmitt Triggers, Filtered Inputs for Noise Suppression

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Timing Diagrams

Bus Timing

Figure 3. Bus Timing(1)

Write Cycle Timing

Note:

1. SCL: Serial Clock; SDA: Serial Data I/O

2. The write cycle time tWR is the time from a valid stop condition of a write sequence to

the end of the internal clear/write cycle.

Figure 4. Write Cycle Timing

Data Validity

tWR(1)

Note: 1. SCL: Serial Clock; SDA: Serial Data I/O

Figure 5. Data Validity

SDA

SCL

DATA STABLE

DATA

CHANGE

6 AT24C1024SC

5045AâSEEPRâ04/04

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