AT90USB647_14 Datasheet, PDF (85/456 Pages) ATMEL Corporation – 135 powerful instructions – most single clock cycle execution

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Table 11-13. Overriding signals for alternate functions PD7..PD4.
Signal name PD7/T0
PD6/T1
PD5/XCK1
PUOE
0
0
0
PUOV
0
0
0
DDOE
0
0
XCK1 OUTPUT ENABLE
DDOV
0
0
1
PVOE
0
0
XCK1 OUTPUT ENABLE
PVOV
0
0
XCK1 OUTPUT
DIEOE
0
0
0
DIEOV
0
0
0
DI
T0 INPUT
T1 INPUT
XCK1 INPUT
AIO
–
–
–
PD4/ICP1
0
0
0
0
0
0
0
0
ICP1 INPUT
–
Table 11-14. Overriding signals for alternate functions in PD3..PD0 ⁽¹⁾.
Signal name PD3/INT3/TXD1 PD2/INT2/RXD1
PD1/INT1/SDA/OC2 PD0/INT0/SCL/OC0
B
B
PUOE
TXEN1
RXEN1
TWEN
TWEN
PUOV
0
PORTD2 • PUD
PORTD1 • PUD
PORTD0 • PUD
DDOE
TXEN1
RXEN1
TWEN
TWEN
DDOV
1
0
SDA_OUT
SCL_OUT
PVOE
TXEN1
0
TWEN | OC2B
ENABLE
TWEN | OC0B
ENABLE
PVOV
TXD1
0
OC2B
OC0B
DIEOE
INT3 ENABLE INT2 ENABLE
INT1 ENABLE
INT0 ENABLE
DIEOV
1
1
1
1
DI
INT3 INPUT
INT2 INPUT/RXD1 INT1 INPUT
INT0 INPUT
AIO
–
–
SDA INPUT
SCL INPUT
Note:
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output pins PD0
and PD1. This is not shown in this table. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
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