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AT91SAM9R64_14 Datasheet, PDF (785/903 Pages) ATMEL Corporation – Multi-layer AHB Bus Matrix for Large Bandwidth Transfers | |||
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AT91SAM9R64/RL64
41.5.18 UDPHS Endpoint Control Disable Register
Name:
UDPHS_EPTCTLDISx [x=0..6]
Access Type:
Write-only
31
30
29
28
27
26
25
24
SHRT_PCKT
â
â
â
â
â
â
â
23
22
21
20
19
18
17
16
â
â
â
â
â
BUSY_BANK
â
â
15
NAK_OUT
14
NAK_IN/
ERR_FLUSH
13
STALL_SNT/
ERR_CRISO/
ERR_NBTRA
12
RX_SETUP/
ERR_FL_ISO
11
TX_PK_RDY/
ERR_TRANS
10
TX_COMPLT
9
RX_BK_RDY
8
ERR_OVFLW
7
6
5
4
3
2
1
0
MDATA_RX DATAX_RX
â
NYET_DIS INTDIS_DMA
â
AUTO_VALID EPT_DISABL
For additional Information, see âUDPHS Endpoint Control Registerâ on page 787.
⢠EPT_DISABL: Endpoint Disable
0 = no effect.
1 = disable endpoint.
⢠AUTO_VALID: Packet Auto-Valid Disable
0 = no effect.
1 = disable this bit to not automatically validate the current packet.
⢠INTDIS_DMA: Interrupts Disable DMA
0 = no effect.
1 = disable the âInterrupts Disable DMAâ.
⢠NYET_DIS: NYET Enable (Only for High Speed Bulk OUT endpoints)
0 = no effect.
1 = let the hardware handle the handshake response for the High Speed Bulk OUT transfer.
⢠DATAX_RX: DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)
0 = no effect.
1 = disable DATAx Interrupt.
⢠MDATA_RX: MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)
0 = no effect.
1 = disable MDATA Interrupt.
⢠ERR_OVFLW: Overflow Error Interrupt Disable
0 = no effect.
1 = disable Overflow Error Interrupt.
6289DâATARMâ3-Oct-11
785
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