AT91SAM9R64_14 Datasheet, PDF (667/903 Pages) ATMEL Corporation – Multi-layer AHB Bus Matrix for Large Bandwidth Transfers

AT91SAM9R64/RL64
All these interfaces are shown in Figure 39-6 to Figure 39-10. Figure 39-6 on page 667 shows
the 24-bit single scan TFT display timing; Figure 39-7 on page 667 shows the 4-bit single scan
STN display timing for monochrome and color modes; Figure 39-8 on page 668 shows the 8-bit
single scan STN display timing for monochrome and color modes; Figure 39-9 on page 669
shows the 8-bit Dual Scan STN display timing for monochrome and color modes; Figure 39-10
on page 670 shows the 16-bit Dual Scan STN display timing for monochrome and color modes.
Figure 39-6. TFT Timing (First Line Expanded View)
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [24:16]
LCDD [15:8]
LCDD [7:0]
B0 B1
G0 G1
R0 R1
Figure 39-7. Single Scan Monochrome and Color 4-bit Panel Timing (First Line Expanded View)
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [3]
LCDD [2]
LCDD [1]
LCDD [0]
P0 P4
P1 P5
P2 P6
P3 P7
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [3]
LCDD [2]
LCDD [1]
LCDD [0]
R0 G1
G0 B1
B0 R2
R1 G2
6289D–ATARM–3-Oct-11
667