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AT17F080_14 Datasheet, PDF (7/19 Pages) ATMEL Corporation – In-System Programmable (ISP) via 2-wire Bus
AT17F040/080
5.9 A2(1)
5.10 READY
5.11 SER_EN(1)
5.12 VCC
Device selection input, (when SER_EN Low). The input is used to enable (or chip select) the
device during programming (i.e., when SER_EN is Low). Refer to the AT17F Programming
Specification available on the Atmel web site for additional details.
Open collector reset state indicator. Driven Low during power-up reset, released when power-up
is complete. (recommended 4.7 kΩ pull-up on this pin if used).
The serial enable input must remain High during FPGA configuration operations. Bringing
SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications,
SER_EN should be tied to VCC.
+3.3V (±10%).
Notes: 1. This pin has an internal 20 kΩ pull-up resistor.
2. This pin has an internal 30 kΩ pull-down resistor.
7
3039K–CNFG–2/08