AT17F080_14 Datasheet, PDF (11/19 Pages) ATMEL Corporation – In-System Programmable (ISP) via 2-wire Bus

AT17F040/080
16. AC Characteristics
Symbol Description
T_OE(2)
OE to Data Delay
T_CE(2)
CE to Data Delay
T_CAC(2)
CLK to Data Delay
T_OH
Data Hold from CE, OE, or CLK
T_DF(3)
CE or OE to Data Float Delay
T_LC
CLK Low Time
T_HC
T_SCE
T_HCE
T_HOE
F_MAX
F_MAX
T_WR
T_EC
CLK High Time
CE Setup Time to CLK
(to guarantee proper counting)
CE Hold Time from CLK
(to guarantee proper counting)
RESET/OE Low Time
(guarantees counter is reset)
Maximum Input Clock Frequency
SEREN = 0
Maximum Input Clock Frequency
SEREN = 1
Write Cycle Time⁽⁴⁾
Erase Cycle Time⁽⁴⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
Industrial⁽¹⁾
Commercial
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Commercial
Industrial⁽¹⁾
AT17F040/080
Min
Max
50
55
55
60
3
30
30
0
0
15
15
15
15
15
15
20
25
0
0
20
20
10
10
33
33
12
12
13
13
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
µs
µs
s
s
Notes:
1. Preliminary specifications for military operating range only.
2. AC test lead = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady-state active levels.
4. See the AT17F Programming Specfication for procedural information.
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3039K–CNFG–2/08