SAM3S_14 Datasheet, PDF (655/1087 Pages) ATMEL Corporation – AT91SAM ARM-based Flash MCU

34.6 Product Dependencies
34.6.1 I/O Lines
The pins used for interfacing the USART may be multiplexed with the PIO lines. The programmer must first pro-
gram the PIO controller to assign the desired USART pins to their peripheral function. If I/O lines of the USART are
not used by the application, they can be used for other purposes by the PIO Controller.
To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory. If the
hardware handshaking feature or Modem mode is used, the internal pull up on TXD must also be enabled.
All the pins of the modems may or may not be implemented on the USART. Only USART1 fully equipped with all
the modem signals. On USARTs not equipped with the corresponding pin, the associated control bits and statuses
have no effect on the behavior of the USART.
34.6.2 Power Management
The USART is not continuously clocked. The programmer must first enable the USART Clock in the Power Man-
agement Controller (PMC) before using the USART. However, if the application does not require USART
operations, the USART clock can be stopped when not needed and be restarted later. In this case, the USART will
resume its operations where it left off.
Configuring the USART does not require the USART clock to be enabled.
34.6.3 Interrupt
The USART interrupt line is connected on one of the internal sources of the Interrupt Controller. Using the USART
interrupt requires the Interrupt Controller to be programmed first. Note that it is not recommended to use the
USART interrupt line in edge sensitive mode.
34.7 Functional Description
The USART is capable of managing several types of serial synchronous or asynchronous communications.
It supports the following communication modes:
• 5- to 9-bit full-duplex asynchronous serial communication
– MSB- or LSB-first
– 1, 1.5 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling receiver frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multidrop serial communication
• High-speed 5- to 9-bit full-duplex synchronous serial communication
– MSB- or LSB-first
– 1 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
SAM3S [DATASHEET]
6500E–ATARM–11-Feb-13
655