AT24C04B_09 Datasheet, PDF (6/28 Pages) ATMEL Corporation – Two-wire Serial EEPROM

3. Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods (see Figure 6 ). Data changes during SCL high periods will indicate a
start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (see Figure 7).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see Figure 7).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C04B/08B features a low-power standby mode which is enabled:
(a) Upon power-up and
(b) After the receipt of the STOP bit and the completion of any internal operations.
2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any
2-wire part can be reset by following these steps:
(a) Create a start bit condition,
(b) Clock 9 cycles,
(c) Create another start bit followed by a stop bit condition as shown below. The device is ready for the next
communication after the above steps have been completed.
Figure 3. Software reset
Start bit
Dummy Clock Cycles
Start bit
Stop bit
SCL
1
2
3
8
9
SDA
6 AT24C04B/08B
5226G–SEEPR–11/09