AT91SAM9263 Datasheet, PDF (589/1029 Pages) ATMEL Corporation – Thumb Microcontrollers

AT91SAM9263 Preliminary
35.7.1 AC’97 Controller Mode Register
Name:
AC97C_MR
Access Type:
Read-Write
31
30
29
28
–
–
–
–
23
22
21
20
–
–
–
–
15
14
13
12
–
–
–
–
7
6
5
4
–
–
–
–
27
26
25
24
–
–
–
–
19
18
17
16
–
–
–
–
11
10
9
8
–
–
–
–
3
2
1
0
–
VRA
WRST
ENA
• VRA: Variable Rate (for Data Slots 3-12)
0: Variable Rate is inactive. (48 KHz only)
1: Variable Rate is active.
• WRST: Warm Reset
0: Warm Reset is inactive.
1: Warm Reset is active.
• ENA: AC’97 Controller Global Enable
0: No effect. AC’97 function as well as access to other AC’97 Controller registers are disabled.
1: Activates the AC’97 function.
35.7.2 AC’97 Controller Input Channel Assignment Register
Register Name:
AC97C_ICA
Access Type:
Read/Write
31
30
–
–
23
22
CHID10
15
14
CHID8
7
6
CHID5
29
21
13
CHID7
5
28
CHID12
20
12
4
CHID4
27
19
CHID9
11
3
26
18
10
CHID6
2
25
24
CHID11
17
16
CHID8
9
8
CHID5
1
0
CHID3
• CHIDx: Channel ID for the input slot x
CHIDx
Selected Receive Channel
0x0
None. No data will be received during this Slot x
0x1
Channel A data will be received during this slot time.
0x2
Channel B data will be received during this slot time
6249B–ATARM–14-Dec-06
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