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AT91SAM9263 Datasheet, PDF (1/1029 Pages) ATMEL Corporation – Thumb Microcontrollers | |||
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Features
⢠Incorporates the ARM926EJ-S⢠ARM® Thumb® Processor
â DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration
â 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
â 220 MIPS at 200 MHz
â Memory Management Unit
â EmbeddedICEâ¢, Debug Communication Channel Support
â Mid-level Implementation Embedded Trace Macrocellâ¢
⢠Bus Matrix
â Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth
â Boot Mode Select Option, Remap Command
⢠Embedded Memories
â One 128 Kbyte Internal ROM, Single-cycle Access at Maximum Bus Matrix Speed
â One 80 Kbyte Internal SRAM, Single-cycle Access at Maximum Processor or Bus
Matrix Speed
â One 16 Kbyte Internal SRAM, Single-cycle Access at Maximum Bus Matrix Speed
⢠Dual External Bus Interface (EBI0 and EBI1)
â EBI0 Supports SDRAM, Static Memory, ECC-enabled NAND Flash and
CompactFlash®
â EBI1 Supports SDRAM, Static Memory and ECC-enabled NAND Flash
⢠DMA Controller (DMAC)
â Acts as one Bus Matrix Master
â Embeds 2 Unidirectional Channels with Programmable Priority, Address
Generation, Channel Buffering and Control
⢠Twenty Peripheral DMA Controller Channels (PDC)
⢠LCD Controller
â Supports Passive or Active Displays
â Up to 24 bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode
â Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Supports Virtual
Screen Buffers
⢠2D Graphics Accelerator
â Line Draw, Block Transfer, Polygon Fill, Clipping, Commands Queuing
⢠Image Sensor Interface
â ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
â 12-bit Data Interface for Support of High Sensibility Sensors
â SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
⢠USB 2.0 Full Speed (12 Mbits per second) Host Double Port
â Dual On-chip Transceivers
â Integrated FIFOs and Dedicated DMA Channels
⢠USB 2.0 Full Speed (12 Mbits per second) Device Port
â On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
⢠Ethernet MAC 10/100 Base-T
â Media Independent Interface or Reduced Media Independent Interface
â 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
⢠Fully-featured System Controller, including
â Reset Controller, Shutdown Controller
â Twenty 32-bit Battery Backup Registers for a Total of 80 Bytes
â Clock Generator and Power Management Controller
â Advanced Interrupt Controller and Debug Unit
AT91 ARM
Thumb
Microcontrollers
AT91SAM9263
Preliminary
6249BâATARMâ14-Dec-06
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