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SAM3U Datasheet, PDF (58/59 Pages) ATMEL Corporation – AT91SAM ARM-based Flash MCU | |||
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6430BS Comments
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Introduction:
Section 1. âSAM3U Descriptionâ, Updated: 52 Kbytes of SRAM. 4x USARTs (SAM3U1C/2C/4C have 3), up to
2x TWIs (SAM3U1C/2C/4C have 1), up to 5x SPIs SAM3U1C/2C/4C have 4),
Table 1-1, âConfiguration Summaryâ,EBI column updated, 8 bits for SAM3U1C/2C/4C
SAM3U4/3/2C rows FWUP replaces NO in FWUP,SHDN pins column
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Figure 2-1 â144-pin SAM3U4/2/1E Block Diagramâ and Figure 2-2 â100-pin SAM3U4/2/1C Block Diagramâ
updated, SM cell removed; UART moved to peripheral area, added Flash Unique block, removed 12B from
ADC block, added SysTick counter and Fmax 96 MHz to M3 block. FWUP replaces WKUP in fig 2-1, FWUP
added to fig 2-2
Figure 2-2 â100-pin SAM3U4/2/1C Block Diagramâ, NWR1/NBS1, NXRP0, A0 removed from block diagram.
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Table 3-1, âSignal Description Listâ, Schmitt Trigger added âPIO Controller - PIOA - PIOB - PIOCâ. exception
details given in footnote.
VDDIN, VDDOUT added to table.
âSerial Wire/JTAG Debug Port (SWJ-DP)â replaced ICE and JTAG. This section of the table updated
status of pulldowns and pullups specified.
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Section 4. âPackage and Pinoutâ, reorganized according to product.
Section 4.1 âSAM3U4/2/1E Package and Pinoutâ and Section 4.2 âSAM3U4/2/1C Package and Pinoutâ,
pinouts finalized in datasheet.
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Section 5.5.1 âBackup Modeâ, BOD replaced by Supply Monitor/SM. FWUP âFalling Edge Detector.
Figure 5-4 âWake-up Sourceâ, BODEN replaced by SMEN.
Table 5-1, âLow Power Mode Configuration Summaryâ, PIO state in Low Power Modes, backup mode is;
âPrevious state saved.
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Section 6.6 âNRSTB Pinâ, VDDIO changed to VDDBU
Section 6. âInput/Output Linesâ, replaces Section 5.8 âProgrammable I/O Linesâ.
Section 6.1 âGeneral Purpose I/O Lines (GPIO)â and Section 6.2 âSystem I/O Linesâ, replace Section 6. âI/O
Line Considerationsâ.
Figure 6-1 âOn-Die Termination schematicâ, added.
Section 6.8 âPIO Controllersâ, removed.
Section 8. âProduct Mappingâ, title changed from âMemoriesâ.
Section 9. âMemoriesâ, now comprises Section 9.1 âEmbedded Memoriesâ and Section 9.2 âExternal
Memoriesâ.
Section 9.1.3.5 âSecurity Bit Featureâ, updated
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Table 7-3, âSAM3U Master to Slave Accessâ, Slave 9, High Speed Peripheral Bridge line added.
Section 7.2 âAPB/AHB Bridgesâ, reference to ADC updated â10-bit ADC, 12-bit ADC (ADC12B)â.
Table 11-3, âMultiplexing on PIO Controller B (PIOB)â, ADC12B2, ADC12B3 properly listed.
Section 12.10.1 â12-bit High Speed ADCâ, Section 12.10.2 â10-bit Low Power ADCâ, titles changed.
âQuadrature Decoder Logicâ on page 49, properly stated in list of TC functions.
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Section 12.10.1 â12-bit High Speed ADCâ, 2nd item on list updated.
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Section 12.10.2 â10-bit Low Power ADCâ, Ksample values updated on 2nd item of list.
Doc. Rev
6430AS
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First issue
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58 SAM3U Series
6430ESâATARMâ22-Aug-11
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