SAM3U_14 Datasheet, PDF (573/1187 Pages) ATMEL Corporation – From 64 to 256 Kbytes embedded Flash

• CKG: Transmit Clock Gating Selection
Value
Name
Description
0
NONE
None
1
CONTINUOUS
Transmit Clock enabled only if TF Low
2
TRANSFER
Transmit Clock enabled only if TF High
SAM3U Series
• START: Transmit Start Selection
Value
Name
Description
0
CONTINUOUS
Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and
immediately after the end of transfer of the previous data.
1
RECEIVE
Receive start
2
RF_LOW
Detection of a low level on TF signal
3
RF_HIGH
Detection of a high level on TF signal
4
RF_FALLING
Detection of a falling edge on TF signal
5
RF_RISING
Detection of a rising edge on TF signal
6
RF_LEVEL
Detection of any level change on TF signal
7
RF_EDGE
Detection of any edge on TF signal
8
CMP_0
Compare 0
• STTDLY: Transmit Start Delay
If STTDLY is not 0, a delay of STTDLY clock cycles is inserted between the start event and the actual start of transmission
of data. When the Transmitter is programmed to start synchronously with the Receiver, the delay is also applied.
Note: STTDLY must be set carefully. If STTDLY is too short in respect to TAG (Transmit Sync Data) emission, data is emit-
ted instead of the end of TAG.
• PERIOD: Transmit Period Divider Selection
This field selects the divider to apply to the selected Transmit Clock to generate a new Frame Sync Signal. If 0, no period
signal is generated. If not 0, a period signal is generated at each 2 x (PERIOD+1) Transmit Clock.
6430F–ATARM–21-Feb-12
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