SAM3U_14 Datasheet, PDF (223/1187 Pages) ATMEL Corporation – From 64 to 256 Kbytes embedded Flash

SAM3U Series
13.22.9.1
MPU configuration for a microcontroller
Usually, a microcontroller system has only a single processor and no caches. In such a system,
program the MPU as follows:
Table 13-40. Memory region attributes for a microcontroller
Memory region TEX
C B S Memory type and attributes
Flash memory b000
1 0 0 Normal memory, Non-shareable, write-through
Internal SRAM b000
1 0 1 Normal memory, Shareable, write-through
External SRAM b000
1 1 1 Normal memory, Shareable, write-back, write-allocate
Peripherals
b000
0 1 1 Device memory, Shareable
In most microcontroller implementations, the share ability and cache policy attributes do not
affect the system behavior. However, using these settings for the MPU regions can make the
application code more portable. The values given are for typical situations. In special systems,
such as multiprocessor designs or designs with a separate DMA engine, the share ability attri-
bute might be important. In these cases refer to the recommendations of the memory device
manufacturer.
6430F–ATARM–21-Feb-12
223