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AT91SAM9261S_1 Datasheet, PDF (544/709 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers | |||
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35.9.13 MCI Interrupt Mask Register
Name:
MCI_IMR
Address: 0xFFFA804C
Access Type: Read-only
31
30
29
UNRE
OVRE
â
23
22
21
â
DTOE
DCRCE
15
14
13
TXBUFE
RXBUFF
â
7
ENDTX
6
ENDRX
5
NOTBUSY
28
â
20
RTOE
12
â
4
DTIP
⢠CMDRDY: Command Ready Interrupt Mask
⢠RXRDY: Receiver Ready Interrupt Mask
⢠TXRDY: Transmit Ready Interrupt Mask
⢠BLKE: Data Block Ended Interrupt Mask
⢠DTIP: Data Transfer in Progress Interrupt Mask
⢠NOTBUSY: Data Not Busy Interrupt Mask
⢠ENDRX: End of Receive Buffer Interrupt Mask
⢠ENDTX: End of Transmit Buffer Interrupt Mask
⢠RXBUFF: Receive Buffer Full Interrupt Mask
⢠TXBUFE: Transmit Buffer Empty Interrupt Mask
⢠RINDE: Response Index Error Interrupt Mask
⢠RDIRE: Response Direction Error Interrupt Mask
⢠RCRCE: Response CRC Error Interrupt Mask
⢠RENDE: Response End Bit Error Interrupt Mask
⢠RTOE: Response Time-out Error Interrupt Mask
⢠DCRCE: Data CRC Error Interrupt Mask
⢠DTOE: Data Time-out Error Interrupt Mask
⢠OVRE: Overrun Interrupt Mask
⢠UNRE: UnderRun Interrupt Mask
0 = The corresponding interrupt is not enabled.
1 = The corresponding interrupt is enabled.
AT91SAM9261S
27
â
19
RENDE
11
â
3
BLKE
26
â
18
RCRCE
10
â
2
TXRDY
25
â
17
RDIRE
9
â
1
RXRDY
24
â
16
RINDE
8
â
0
CMDRDY
6242EâATARMâ11-Sep09
544
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