AT91SAM9261S_1 Datasheet, PDF (198/709 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM9261S
22.14.1 SMC Setup Register
Register Name:SMC_SETUP[0..7]
Addresses: 0xFFFFEC00 [0], 0xFFFFEC10 [1], 0xFFFFEC20 [2], 0xFFFFEC30 [3], 0xFFFFEC40 [4], 0xFFFFEC50 [5],
0xFFFFEC60 [6], 0xFFFFEC70 [7]
Access Type:Read-write
31
30
29
28
27
26
25
24
–
–
NCS_RD_SETUP
23
22
21
20
19
18
17
16
–
–
NRD_SETUP
15
14
13
12
11
10
9
8
–
–
NCS_WR_SETUP
7
6
5
4
3
2
1
0
–
–
NWE_SETUP
• NWE_SETUP: NWE Setup Length
The NWE signal setup length is defined as:
NWE setup length = (128* NWE_SETUP[5] + NWE_SETUP[4:0]) clock cycles
• NCS_WR_SETUP: NCS Setup Length in WRITE Access
In write access, the NCS signal setup length is defined as:
NCS setup length = (128* NCS_WR_SETUP[5] + NCS_WR_SETUP[4:0]) clock cycles
• NRD_SETUP: NRD Setup Length
The NRD signal setup length is defined in clock cycles as:
NRD setup length = (128* NRD_SETUP[5] + NRD_SETUP[4:0]) clock cycles
• NCS_RD_SETUP: NCS Setup Length in READ Access
In read access, the NCS signal setup length is defined as:
NCS setup length = (128* NCS_RD_SETUP[5] + NCS_RD_SETUP[4:0]) clock cycles
6242E–ATARM–11-Sep09
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