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AT91SAM9R64 Datasheet, PDF (47/911 Pages) ATMEL Corporation – Thumb Microcontrollers | |||
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AT91SAM9R64/RL64 Preliminary
â Endpoint 0: 64 bytes, 1 bank mode
â Endpoint 1 & 2: 1024 bytes, 2 banks mode, HS isochronous capable, DMA
â Endpoint 3 & 4: 1024bytes, 3 banks mode, DMA
â Endpoint 5 & 6: 1024 bytes, 3 banks mode, HS isochronous capable, DMA
11.10 LCD Controller (LCDC)
⢠Single and Dual scan color and monochrome passive STN LCD panels supported
⢠Single scan active TFT LCD panels supported.
⢠4-bit single scan, 8-bit single or dual scan, 16-bit dual scan STN interfaces supported
⢠Up to 24-bit single scan TFT interfaces supported
⢠Up to 16 gray levels for mono STN and up to 4096 colors for color STN displays
⢠1, 2 bits per pixel (palletized), 4 bits per pixel (non-palletized) for mono STN
⢠1, 2, 4, 8 bits per pixel (palletized), 16 bits per pixel (non-palletized) for color STN
⢠1, 2, 4, 8 bits per pixel (palletized), 16, 24 bits per pixel (non-palletized) for TFT
⢠Single clock domain architecture
⢠Resolution supported up to 2048 x 2048
11.11 Touch Screen Analog-to-digital Converter (TSADCC)
⢠6-channel ADC
⢠Support 4-wire resistive Touch Screen
⢠10-bit 384 Ksamples/sec. Successive Approximation Register ADC
⢠-3/+3 LSB Integral Non Linearity, -2/+2 LSB Differential Non Linearity
⢠Integrated 6-to-1 multiplexer, offering eight independent 3.3V analog inputs
⢠External voltage reference for better accuracy on low voltage inputs
⢠Individual enable and disable of each channel
⢠Multiple trigger sources
â Hardware or software trigger
â External trigger pin
â Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger
⢠Sleep Mode and conversion sequencer
â Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
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6289AâATARMâ15-Jan-08
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