AT32AP7002_09 Datasheet, PDF (46/52 Pages) ATMEL Corporation – AVR 32 32-bit Microcontroller

10.2 Rev. B
10.3 Rev. A
AT32AP7002
Configure the MCI Mode Register (MR) to accept 8-bit data input by writing a 1 to bit 13
(FBYTE), and transfer each byte of the transmit data to TDR by right aligning the useful
value. This allows the number of bytes transferred into the TDR to match the number set up
in the BCNT field of the MCI Block Register (BLKR).
35. Unreliable branch folding
In certain situations, branch folding does not work as expected.
Fix/Workaround
Write 0 to CPUCR.FE before executing any branch instructions after reset.
36. USB PLL jitter may cause packet loss during USB hi-speed transmission
The USB Hi-speed PLL accuracy is not sufficient for Isochronous USB hi-speed transmis-
sion and may cause packet loss. The observed bit-loss is typically < 125 ppm.
Fix/Workaround
Do not use isochronous mode if absolute data accuracy is critical.
Not sampled.
Not sampled.
46
32054FS–AVR32–09/09