AT32AP7002_09 Datasheet, PDF (16/52 Pages) ATMEL Corporation – AVR 32 32-bit Microcontroller

AT32AP7002
5. I/O Line Considerations
5.1 JTAG pins
The TMS, TDI and TCK pins have pull-up resistors. TDO is an output, driven at up to VDDIO,
and have no pull-up resistor. The TRST_N pin is used to initialize the embedded JTAG TAP
Controller when asserted at a low level. It is a schmitt input and integrates permanent pull-up
resistor to VDDIO, so that it can be left unconnected for normal operations.
5.2 WAKE_N pin
The WAKE_N pin is a schmitt trigger input integrating a permanent pull-up resistor to VDDIO.
5.3 RESET_N pin
The RESET_N pin is a schmitt input and integrates a permanent pull-up resistor to VDDIO. As
the product integrates a power-on reset cell, the RESET_N pin can be left unconnected in case
no reset from the system needs to be applied to the product.
5.4 EVTI_N pin
5.5 TWI pins
The EVTI_N pin is a schmitt input and integrates a non-programmable pull-up resistor to VDDIO.
5.6 PIO pins
When these pins are used for TWI, the pins are open-drain outputs with slew-rate limitation and
inputs with inputs with spike-filtering. When used as GPIO-pins or used for other peripherals, the
pins have the same characteristics as PIO pins.
All the I/O lines integrate a programmable pull-up resistor. Programming of this pull-up resistor is
performed independently for each I/O line through the PIO Controllers. After reset, I/O lines
default as inputs with pull-up resistors enabled, except when indicated otherwise in the column
“Reset State” of the PIO Controller multiplexing tables.
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32054FS–AVR32–09/09