AT91SAM9XE128_1 Datasheet, PDF (432/866 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

32.6.3.2 Master Mode Flow Diagram
Figure 32-6. Master Mode Flow Diagram
SPI Enable
1
TDRE ?
- NPCS defines the current Chip Select
- CSAAT, DLYBS, DLYBCT refer to the fields of the
Chip Select Register corresponding to the Current Chip Select
- When NPCS is 0xF, CSAAT is 0.
0
1
CSAAT ?
0
PS ?
Fixed
0
peripheral
Variable
1
peripheral
NPCS = SPI_TDR(PCS)
NPCS = SPI_MR(PCS)
PS ?
Fixed
0 _peripheral
Variable
1 _peripheral
yes
SPI_TDR(PCS)
= NPCS ?
SPI_MR(PCS)
= NPCS ?
no
NPCS = 0xF
no
NPCS = 0xF
Delay DLYBCS
Delay DLYBCS
NPCS = SPI_TDR(PCS)
NPCS = SPI_MR(PCS),
SPI_TDR(PCS)
Delay DLYBS
Serializer = SPI_TDR(TD)
TDRE = 1
Data Transfer
SPI_RDR(RD) = Serializer
RDRF = 1
Delay DLYBCT
0
TDRE ?
1
1
CSAAT ?
0
NPCS = 0xF
Delay DLYBCS
432 AT91SAM9XE128/256/512 Preliminary
6254B–ATARM–29-Apr-09