AT91SAM9XE128_1 Datasheet, PDF (149/866 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

AT91SAM9XE128/256/512 Preliminary
20.3.2.2
Data Read Optimization
The organization of the Flash in 128 bits is associated with two 128-bit prefetch buffers and one
128-bit data read buffer, thus providing maximum system performance. This buffer is added in
order to start access at the following data during the second read. This speeds up sequential
data reads if, for example, FWS is equal to 1 (see Figure 20-5).
Note: No consecutive data read accesses are mandatory to benefit from this optimization.
Figure 20-5. Data Read Optimization in ARM Mode for FWS = 1
Master Clock
ARM Request
(32-bit)
@Byte 0
Flash Access _XXX
@4
@8
@ 12 @ 16
Bytes 0-15
@ 20 @ 24 @ 28 @ 32
@ 36
Bytes 16-31
Bytes 32-47
Buffer (128bits)
Data To ARM
XXX
Bytes 0-15
XXX
Bytes 0-3
4-7
8-11 _12-15
Bytes 16-31
16-19 20-23 24-27 28-31
32-35
6254B–ATARM–29-Apr-09
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