ATTINY261_14 Datasheet, PDF (37/206 Pages) ATMEL Corporation – High Performance, Low Power AVR

Table 8-2. Sleep Mode Select
SM1
SM0
0
0
0
1
1
0
1
1
Sleep Mode
Idle
ADC noise reduction
Power-down
Standby
• Bit 2 – Res: Reserved Bit
This bit is a reserved ed bit in the Atmel^® ATtiny261/461/861 and will always read as zero.
8.8.2 PRR – Power Reduction Register
Bit
7
6
5
4
3
2
1
0
0x36 (0x56)
–
-
-
-
PRTIM1 PRTIM0 PRUSI PRADC PRR
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7, 6, 5, 4- Res: Reserved Bits
These bits are reserved bits in the Atmel ATtiny261/461/861 and will always read as zero.
• Bit 3- PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will
continue like before the shutdown.
• Bit 2- PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0 is enabled, operation will
continue like before the shutdown.
• Bit 1 - PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When waking up the USI again, the
USI should be re initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. Also analog comparator
needs this clock.
ATtiny261/ATtiny461/ATtiny861/ATtiny461 [DATASHEET]
37
7753G–AVR–06/14