ATTINY261_14 Datasheet, PDF (35/206 Pages) ATMEL Corporation – High Performance, Low Power AVR

8.4 Power-down Mode
When the SM1..0 bits are written to 10, the SLEEP instruction makes the MCU enter power-down mode. In this mode, the
oscillator is stopped, while the external interrupts, and the watchdog continue operating (if enabled). Only an external reset,
a watchdog reset, a brown-out reset, an external level interrupt on INT0, or a pin change interrupt can wake up the MCU.
This sleep mode halts all generated clocks, allowing operation of asynchronous modules only.
Note that if a level triggered interrupt is used for wake-up from power-down mode, the changed level must be held for some
time to wake up the MCU. Refer to Section 11. “External Interrupts” on page 49 for details.
8.5 Standby Mode
When the SM1..0 bits are written to 11 and an external crystal/resonator clock option is selected, the SLEEP instruction
makes the MCU enter standby mode. This mode is identical to power-down with the exception that the oscillator is kept
running. From standby mode, the device wakes up in six clock cycles.
8.6 Power Reduction Register
The power reduction register (PRR), see Section 8.8.2 “PRR – Power Reduction Register” on page 37, provides a method to
stop the clock to individual peripherals to reduce power consumption. The current state of the peripheral is frozen and the I/O
registers can not be read or written. Resources used by the peripheral when stopping the clock will remain occupied, hence
the peripheral should in most cases be disabled before stopping the clock. Waking up a module, which is done by clearing
the bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in idle mode and active mode to significantly reduce the overall power consumption. See
Section 24.3 “Supply Current of I/O Modules” on page 182 for examples. In all other sleep modes, the clock is already
stopped.
8.7 Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an AVR^® controlled system. In
general, sleep modes should be used as much as possible, and the sleep mode should be selected so that as few as
possible of the device’s functions are operating. All functions not needed should be disabled. In particular, the following
modules may need special consideration when trying to achieve the lowest possible power consumption.
8.7.1
Analog to Digital Converter
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled before entering any
sleep mode. When the ADC is turned off and on again, the next conversion will be an extended conversion. Refer to
Section 19. “ADC – Analog to Digital Converter” on page 132 for details on ADC operation.
8.7.2
Analog Comparator
When entering idle mode, the analog comparator should be disabled if not used. When entering ADC noise reduction mode,
the analog comparator should be disabled. In the other sleep modes, the analog comparator is automatically disabled.
However, if the analog comparator is set up to use the internal voltage reference as input, the analog comparator should be
disabled in all sleep modes. Otherwise, the internal voltage reference will be enabled, independent of sleep mode. Refer to
Section 18. “AC – Analog Comparator” on page 129 for details on how to configure the analog comparator.
8.7.3
Brown-out Detector
If the brown-out detector is not needed in the application, this module should be turned off. If the brown-out detector is
enabled by the BODLEVEL fuses, it will be enabled in all sleep modes, and hence, always consume power. In the deeper
sleep modes, this will contribute significantly to the total current consumption. Refer to
Section 9.5 “Brown-out Detection” on page 41 for details on how to configure the brown-out detector.
ATtiny261/ATtiny461/ATtiny861/ATtiny461 [DATASHEET]
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