XMEGAA Datasheet, PDF (281/375 Pages) ATMEL Corporation – 8-bit XMEGAA Microcontroller

XMEGA A
23.14.8 CAL - ADC Calibration value registers
Bit
7
6
5
4
3
2
1
0
+0x0C
CAL[7:0]
CAL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7:0 - CAL[7:0]: ADC Calibration value
This is the calibration value to cancel the gain error. The ADC is calibrated during production
programming, the calibration value must be read from the signature row and written to the CAL
register from software.
23.14.9
CHnRESH - ADC Channel n Result register High
The CHnRESL and CHnRESH register pair represents the 16-bit value CHnRES. For details on
reading 16-bit register refer to Section 3.11 ”Accessing 16-bits Registers” on page 12.
Bit
7
6
5
4
3
2
1
0
12-bit, left
CHRES[11:4]
12-bit, right
-
-
-
-
CHRES[11:8]
8-bit
-
-
-
-
-
-
-
-
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
23.14.9.1 12-bit mode, left adjusted
• Bits 7:0 - CHRES[11:4]: ADC Channel Result, high byte
These are the 8 MSB of the 12-bit ADC result.
23.14.9.2 12-bit mode, right adjusted
• Bits 7:4 - Res: Reserved
These bits will in practice be the extension of the sign bit CHRES11 when ADC works in differen-
tial mode and set to zero when ADC works in signed mode.
• Bits 3:0 - CHRES[11:8]: ADC Channel Result, high byte
These are the 4 MSB of the 12-bit ADC result.
23.14.9.3 8-bit mode
• Bits 7:0 - Res: Reserved
These bits will in practice be the extension of the sign bit CHRES7 when ADC works in signed
mode and set to zero when ADC works in single-ended mode.
23.14.10 CHnRESL - ADC Channel n Result register Low
Bit
7
6
5
4
3
2
1
0
12-/8-
CHRES[7:0]
12-bit, left
CHRES[3:0]
-
-
-
-
Read/Write
R
R
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
8077B–AVR–06/08
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