ATA6617C_14 Datasheet, PDF (262/274 Pages) ATMEL Corporation – 8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

4.26 Register Summary (Continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
0x18 (0x38) Reserved
0x17 (0x37) Reserved
0x16 (0x36) TIFR1
–
–
ICF1
–
–
OCF1B OCF1A
TOV1
117
0x15 (0x35) TIFR0
–
–
–
–
–
–
OCF0A
TOV0
117
0x14 (0x34) Reserved
0x13 (0x33) Reserved
0x12 (0x32) PORTCR
–
–
BBMB
BBMA
–
–
PUDB
PUDA
91
0x11 (0x31) Reserved
0x10 (0x30) Reserved
0x0F (0x2F) Reserved
0x0E (0x2E) Reserved
0x0D (0x2D) Reserved
0x0C (0x2C) Reserved
0x0B (0x2B) Reserved
0x0A (0x2A) Reserved
0x09 (0x29) Reserved
0x08 (0x28) Reserved
0x07 (0x27) Reserved
0x06 (0x26) Reserved
0x05 (0x25) PORTB PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0
101
0x04 (0x24) DDRB
DDB7
DDB6
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
101
0x03 (0x23) PINB
PINB7
PINB6
PINB5
PINB4
PINB3
PINB2
PINB1
PINB0
101
0x02 (0x22) PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0
101
0x01 (0x21) DDRA
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
101
0x00 (0x20) PINA
PINA7
PINA6
PINA5
PINA4
PINA3
PINA2
PINA1
PINA0
101
Notes: 1. Address bits exceeding EEAMSB (Table 4-74 on page 225) are don’t care.
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
3. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR^®s, the CBI and
SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status
flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel^®
ATtiny87/167 is a complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
262 ATA6616C/ATA6617C [DATASHEET]
9132I–AUTO–06/14