AT91RM9200_06 Datasheet, PDF (220/689 Pages) ATMEL Corporation – ARM920T-based Microcontroller

Figure 20-4. Asynchronous Read and Write Accesses with Multiplexed Address and Data Buses
BFCS
BFCK
A[24:0]
BFAVD
BFOE
BFWE
D[15:0]
Output
D[15:0]
Input
Read Address
AVL
Write Address
AVL
Read Address
Write Address
Data
Data
OEL = 1
Asynchronous
Read Access
Asynchronous
Write Access
Address Valid Latency = 4 BFCK cycles (AVL field = 3)
Output Enable Latency (OEL) = 1 BFCK cycle
220 AT91RM9200
1768G–ATARM–29-Sep-06