AT17LV010-10DP_05 Datasheet, PDF (2/11 Pages) ATMEL Corporation – Space FPGA Configuration EEPROM

Pin Configuration
Figure 1. 28-pin Flat Pack
RESET/OE 1
NC 2
WP2 3
CE 4
GND 5
NC 6
NC 7
NC 8
NC 9
NC 10
CE0(A2)
NC
NC
READY
Note: * indicates this pin must not be used.
28 NC*
27 NC
26 WP1
25 _CLK
24 DATA
23 NC
22 NC
21 NC
20 NC
19 VCC
18 _NC
17 SER_EN
16 NC
15 _NC
2 AT17LV010-10DP
4265C–AERO–05/05