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ATR2731 Datasheet, PDF (19/26 Pages) ATMEL Corporation – DAB One-chip Front End
ATR2731
12. Electrical Characteristics (Continued)
Test conditions (unless otherwise specified): VS = 8.5V, Tamb = 25°C
No. Parameters
Test Conditions
Pin
Symbol Min. Typ. Max. Unit Type*
10 Phase Detector
39
10.1
I100 = High, I50 = High
10.2
I100 = High, I50 = Low
Charge-pump current
10.3
I100 = Low, I50 = High
10.4
I100 = Low, I50 = Low
10.5 High impedance mode TRI = High
10.6 Effective phase noise(1) IPD = 203 mA
IPD4
160 200 240 µA
A
IPD3
120 150 180 µA
A
IPD2
80 100 120 µA
A
IPD1
35 50
65
µA
A
IPD,tri
–100
100 nA
A
LPD
–159
dBc/
Hz
C
11 Lock indication
41
11.1 Leakage current
11.2 Saturation voltage
12 Switches
VPLCK = 5.5V
IPLCK = 0.25 mA
3, 4, 6
IPLCK,L
VPLCK,sat
10
µA
A
0.5
V
A
12.1 Leakage current
12.2 Saturation voltage
13 Address selection
ISW = 0.25 mA
ISW,L
VSW,sat
44
10
µA
A
0.5
V
A
13.1 AS1 = 0
13.2 AS1 = 1
14 D/A Converters
7, 8, 9
0
0.1 VS
C
0.4
VS
0.6 VS
C
14.1 Output voltage
Cα7 = High
Cα0 to Cα6 = Low
α = A, B, C
VM
4.05 4.25 4.45 V
A
14.2 Variation of VM
14.3 Variation of VM
14.4 Accuracy
VS = 8.00V to 9.35V
Tamb = –40 to +85° C
VCαn–n VM / 128
n = 24 ... 232, α = A, B, C
∆VM,VS
–50
50 mV
A
∆VM,temp
±20
mV
C
∆VCαn
–70
70 mV
A
14.5
Maximum output
current
15 Simple two-wire Bus
ICAOmax
ICBOmax
20
µA
C
ICCOmax
1, 2
15.1 Input voltage SCL/SDA High
3
5.5
V
D
15.2 Input voltage SCL/SDA Low
1.5
V
D
15.3
Output voltage SDA
(open collector)
ISDA = 2 mA,
SDA = Low
0.4
V
D
15.4 SCL clock frequency
0.1
100 kHz
D
15.5 Rise time (SCL, SDA)
15.6 Fall time (SCL; SDA)
15.7
Time before new
transmission can start
tr
tf
tbuf
4.7
1
µs
D
300 µs
D
µs
D
15.8 SCL high period
thigh
4
µs
D
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. The phase detector’s phase-noise contribution to the VCO’s frequency spectrum is determined by the operating frequency
of the phase detector divided by 4 according to the fractional-N technique (typically: 16 kHz).
19
4904A–DAB–03/06