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| AT49LD3200 Datasheet, PDF (10/39 Pages) ATMEL Corporation – 32-megabit (1M x 32 or 2M x 16) High-speed Synchronous Flash Memory | |||
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Addressing Map
WORD = âHâ: x32 Organization(1)
Function
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
Row Address
RA0 RA1 RA2 RA3 RA4 RA5
RA6
RA7
RA8
RA9 RA10 RA11 RA12
Column Address CA0 CA1 CA2 CA3 CA4 CA5 CA6(1)
X
X
X
X
X
X
Note: 1. Column Address MSB (at x32 organization) (X = Donât Care)
WORD = âLâ: x16 Organization(1)
Function
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
Row Address
RA0 RA1 RA2 RA3 RA4 RA5 RA6
RA7
RA8
RA9 RA10 RA11 RA12
Column Address CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7(1)
X
X
X
X
X
Note: 1. Column Address MSB (at x16 organization) (X = Donât Care)
Each Address is Arranged as Follows(1)(2)
For X32 operation,
MSB
LSB
Address Register AR19 AR18 AR17
...
AR8
AR7
AR6
...
AR3
AR2
AR1
AR0
Address
RA12
RA11
RA10
...
RA1
RA0
CA6
...
CA3
CA2
CA1
CA0
BL = 4
* Initial Address BL = 8
Notes: 1. For X16 operation, when CA0 is set to Low, data belonging to 0 ~ 15th registers are output to DQ0 ~ DQ15 pins, and when
CA0 is set to High, data belonging to 16 ~ 31th registers are output to DQ0 ~ DQ15 pins.
2. Asynchronous Boot Block uses x16 operation and A0 ~ A12 as address inputs.
10 AT49LD3200(B)
1940BâFLASHâ11/01
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