AT17C512A Datasheet, PDF (1/11 Pages) ATMEL Corporation – FPGA Serial Configuration Memories

Features
• Serial EEPROM Family for Configuring Altera FLEX^® 10K Devices
• Simple, Easy-to-use 4-pin Interface
• E² Programmable 1M Bit Serial Memories Designed To Store Configuration Programs
For Programmable Gate Arrays
• Cascadable To Support Additional Configurations or Future Higher-density Arrays
• Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available in the Space-efficient Surface-mount PLCC Package
• In-System Programmable Via 2-Wire Bus
• Emulation of 24CXX Serial EPROMs
• Available in 3.3V ± 10% LV and 5V ± 5% C Versions
Description
The AT17C512/010A and AT17LV512/010A (AT17A Series) FPGA Configuration
EEPROMs (Configurators) provide and easy-to-use, cost-effective configuration
memory for programming Altera FLEX Field Programmable Gate Arrays, FPGA, (the
“devices”). The AT17A Series is packaged in the popular 20-pin PLCC package. The
AT17A Series family uses a simple serial-access procedure to configure one or more
FPGA devices. The AT17A Series organization supplies enough memory to configure
one or multiple smaller FPGAs. Using a special feature of the AT17A Series, the user
can select the polarity of the reset function by programming an EEPROM byte. The
AT17C/LV512/010A parts generate their own internal clock and can be used as a sys-
tem “master” for loading the FPGA devices.
The Atmel devices also supports a system friendly READY pin and a write protect
mechanism. The READY pin is used to simplify system power-up considerations. The
WP1 pin is used to protect part of the device memory during in-system programming.
The AT17A Series can be programmed with industry standard programmers.
FPGA Serial
Configuration
Memories
AT17C512A
AT17LV512A
AT17C010A
AT17LV010A
Pin Configurations
20-Pin PLCC
DCLK 4
WP1 5
NC 6
NC 7
RESET/OE 8
18 SER_EN
17 NC
16 NC
15 READY
14 NC
Rev. 0974A–04/98
1