CC2530F32 Datasheet, PDF (9/31 Pages) Aplus Intergrated Circuits – A True System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee Applications

CC2530F32, CC2530F64, CC2530F128, CC2530F256
www.ti.com .......................................................................................................................................................... SWRS081A – APRIL 2009 – REVISED APRIL 2009
ADC CHARACTERISTICS
T_A = 25°C and VDD = 3 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
Input voltage
VDD is voltage on AVDD5 pin
External reference voltage
VDD is voltage on AVDD5 pin
External reference voltage differential
VDD is voltage on AVDD5 pin
Input resistance, signal
Full-scale signal⁽¹⁾
Using 4-MHz clock speed
Peak-to-peak, defines 0 dBFS
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
ENOB⁽¹⁾ Effective number of bits
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
Useful power bandwidth
7-bit setting, both single and differential
Single-ended input, 12-bit setting, –6 dBFS
THD ⁽¹⁾
Total harmonic distortion
Differential input, 12-bit setting, –6 dBFS
Signal to nonharmonic ratio⁽¹⁾
CMRR
DNL ⁽¹⁾
INL ⁽¹⁾
Common-mode rejection ratio
Crosstalk
Offset
Gain error
Differential nonlinearity
Integral nonlinearity
SINAD ⁽¹⁾
(–THD+N)
Signal-to-noise-and-distortion
Conversion time
Power consumption
Internal reference voltage
Single-ended input, 12-bit setting
Differential input, 12-bit setting
Single-ended input, 12-bit setting, –6 dBFS
Differential input, 12-bit setting, –6 dBFS
Differential input, 12-bit setting, 1-kHz sine (0
dBFS), limited by ADC resolution
Single-ended input, 12-bit setting, 1-kHz sine (0
dBFS), limited by ADC resolution
Midscale
12-bit setting, mean
12-bit setting, maximum
12-bit setting, mean
12-bit setting, maximum
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
7-bit setting
9-bit setting
10-bit setting
12-bit setting
MIN TYP MAX
0
VDD
0
VDD
0
VDD
197
2.97
5.7
7.5
9.3
10.8
6.5
8.3
10.0
11.5
0–20
–75.
2
–86.
6
70.2
79.3
78.8
88.9
>84
UNIT
V
V
V
kΩ
V
bits
kHz
dB
dB
dB
>84
dB
–3
mV
0.68
%
0.05
LSB
0.9
4.6
LSB
13.3
35.4
46.8
57.5
66.6
dB
40.7
51.6
61.8
70.8
20
36
µs
68
132
1.2
mA
1.15
V
(1) Measured with 300-Hz sine-wave input and VDD as reference.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Link(s): CC2530F32 CC2530F64 CC2530F128 CC2530F256