APW8855 Datasheet, PDF (18/43 Pages) Anpec Electronics Coropration – High Current, High Frequency 7 Outputs Voltage Regulator and Power Management IC for High Performance Tablet and Ultra Notebook Applications

APW8855
13.5 VR4 Electrical Characteristics
These specifications apply over V = 12V, V = 1.5V, TA = 25^oC, unless otherwise noted.
VSYS
OUT
S ymb ol
Parame ter
Test Conditions
APW8855 (VR4)
Min
Typ
Max
Unit
PR O TE CTI ON
Un der-voltage P rotectio n
( UV P)
65
70
75
%
UV P Deb ounce Time
Over-voltage Pro te ction
( OVP)
-
2
-
µs
12 5
130
13 5
%
OVP Debo unce Time
Hig h-side MOS FE T
IOCP
Over-curre nt-
Protection(O CP )
2
-
µs
4
5
6
A
OCP De boun ce Time
2
µs
Th ermal Shu tdo wn Protectio n TJ Rising
EFFICIENCY
150
?
VOUT=1 .5 V, IOUT=5mA to 5 0mA, DCR<25 m
Ω
85
%
Efficiency (Re fe r to th e typical ^{VOUT=1 .4 5V, IO UT=0.1 A to 3A, DCR<25 mΩ}
82
%
cir cu it)
VOUT=1 .5V, IOUT=0 .1A to 3 A, DCR<25m
Ω
85
%
VOUT=2 .0V, IOUT=3 A, DCR<25mΩ
86
%
13.6 VR5 Electrical Characteristics
These specifications apply over V_VSYS = 12V, V_OUT = 0.95V, TA = 25^oC, unless otherwise noted.
S ymb ol
Parame ter
Test Conditions
AP W8855 (VR5)
Min
Typ
Max
PWM OUTPUT V OLTAGE
Output Vo ltag e Accuracy
TA = 25°C
-
-
±10
Output Vo ltag e Line/Lo ad
Re gulation
5
L oad Transient Drop Volta ge
Tr=200n s, IOUT=2 .16 A to 8A, Refer to the
typical circuit
-35
L oad Transient Overshoo t
Vo ltag e
Tf=200n s, IOUT=8A to 2.16 A, Refer to the
typical circuit
+3 5
Output Step Ramp Rate
Accu racy
-1 0
+1 0
Output Vo ltag e Soft-start Rate
9
10
11
Output Dischar ge Re sistance
10
Fe edback Leakag e Cu rrent
V DDP _ALW_GPIO Thresh old
VVDDP_ ALW_FBP = 5.5 V
VDDP_A LW_GP IO r isin g
VDDP_A LW_GP IO falli ng
-
-
10 0
1.0
1 .2
0.6
0.8
VDDP _ALW_GPIO Inp ut
L eakag e Cur rent
VVDDP_ ALW_GPIO=5V
1
VDDP _ALW_GPIO
De bounce Tim e
Hi gh to lo w and l ow to high
2
Unit
mV
mV
mV
mV
%
mV/µs
Ω
nA
V
V
uA
us
Copyright © ANPEC Electronics Corp.
18
Rev. A.1 - Dec., 2015
www.anpec.com.tw