AMIS-710616 Datasheet, PDF (9/19 Pages) AMI SEMICONDUCTOR – CIS PCB

AMIS-710616-AS: CIS PCB
Product Specification
Data Sheet
11.0 Schematic Diagram
Two reference schematic diagrams are attached to this document (Figure 4 and Figure 5). Only one schematic, CKT 1, Schematic
(Figure 1), is required to represent both the Sensor Board 1 and 2 because the circuits are identical. The second one is for the amplifier
board and it contains all eight of the amplifiers on one schematic. The circuit description of its structure and operation has been briefly
discussed in Section 1 of this document. Its operation follows from the discussion of the simplified block diagram. There are only two
input control clocks for the circuits, CP and SP. SP starts the shift register scanning while CP clocks the register and produces the
video pixels at its same rate. The clocks are entered through the I/O connectors on both sensor boards. They are both externally
buffered with the 74HC00 hexes and applied to the inputs of the image sensors. On each of the two-image array sensor boards there
are four sequential video sections. Each video section contains a row of five sequential image array sensors, AMIS-720639. These are
all clocks in parallel with CP. The four sections on both boards are clocked with SP in parallel, to initiate all eight video sections and
simultaneously begin the eight sequential readouts. All eight lines, four in each sensor board, have reset switches, BU4S66, which
parallel resets the video pixel charges after they are readout. These pixels, read out in parallel, are applied to their respective output
amplifiers on the amplifier board.
The second schematic, CKT 2, Amplifier Board Schematic (Figure 5), is the amplifier board. There are eight amplifiers for processing
the output videos from both sensor boards. The amplifier board receives the inputs from the sensor board output connector, J1, through
two harnesses. They are connected into the input I/O connectors, J1 and J2, of the amplifier board. Since there are two sensor boards
using the same schematic representation, the connector on Sensor Board 1, J1, becomes J2 for the second board. They are physically
differentiated and marked as J1 and J2 on the stiffener board. Since all eight sections process their video signals through identical
amplifiers, only one amplifier circuit is discussed. The AD8051 is an operational amplifier, which is configured into a non-inverting buffer
amplifier with a gain of ≅ 4.5. It is used to isolate the video line from its external circuits. The isolated video line then serves as a storage
capacitance for the pixels outputs. The pixel charges are read out onto the video line capacitance and integrated. This integrated pixel
charge, converted to a voltage pulse, is amplified and produced at the output I/O. The reset switch on the video line, which is located on
the sensor board schematic, resets the pixel signal charge prior to the readout of following pixel.
AMI Semiconductor – July 06, M-20595-001
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