AMIS-720233 Datasheet, PDF (10/12 Pages) AMI SEMICONDUCTOR – Contact Image Sensor

AMIS-720233-B: Contact Image Sensor
Data Sheet
Table 5: Timing Symbol's Definition
Item
Symbol
Min.
Mean
Max.
Units
Clock cycle time
Clock pulse width⁽¹⁾
to
200
tw
50
10000
ns
ns
Clock duty cycle
25
50
75
%
Data setup time
tds
20
ns
Data hold time
tdh
20
ns
Prohibit crossing time⁽²⁾
tprh
20
ns
EOS rise delay
terdl
60
ns
EOS fall delay
tefdl
70
ns
Signal delay time⁽³⁾
tdl
20
ns
Signal settling time⁽³⁾
ts/h
120
ns
Notes:
1. Since the clock pulse width varies with the frequency, tw will vary according to duty cycle.
2. Prohibit crossing time is to insure that no two SPs are locked into the shift register for any single scan time. Since the SP is entered into the shift register during its
active high level when the CP clock edges falls, the active high of the SP is permitted only during one falling, CP clock edges for any given scan. Otherwise,
multiple SPs will load into the shift register.
3. Pixel delay times and settling time depend on the output amplifier, which is employed. These values, tdl and ts/h, are measured with the amplifier see in Figure 9
using the AMIS-720233-B sensors. Note: The impulse signal current out of the device has pulse width ~ 30ns. Hence, the faster the amplifier with a faster settling
time will yield a signal video pulse with faster rise and settle times.
9.0 Typical A6 CIS Module Circuit
Figure 9 depicts a typical A6 CIS module circuit using the AMIS-720233-B sensors. The circuit is provided as a reference to illustrate
the interconnection of the AMIS-720233-B with a serially cascaded line of image sensors. It is a typical A6 size CIS module produced
by AMIS. It provides the first-time user with additional insight for designing a CIS module and supplements the circuit descriptions
given in Section 5.
The difference is in the arrangement of the two shunt switches - U2D and U2A. U2D is a counterpart to SW in
Figure 5. A DC restoration capacitor, C20, with value of 100pf is added between the shunt’s switch. The first, U2D, clamps the video
line to ground to reset the image sensors. Simultaneously the second, U2A, clamps the node between C20 and amplifier input to an
output reference bias voltage that is on the node between R4 and R9. These resistors are voltage dividers that set the DC operating
level of the amplifier’s output by applying same bias voltage to both inputs of the amplifier. See Figure 9.
AMI Semiconductor –May 06, M-20567-001
10
www.amis.com