AM79C965A Datasheet, PDF (181/228 Pages) –

REGISTER SUMMARY
CSRs — Control and Status Registers (continued)
RAP
Symbol
Default Value After Comments
Use
Addr
H_RESET
(Hex)
73
CSR73
xxxx xxxx
Reserved
T
74
CSR74
xxxx xxxx
XMTRC: XMT Ring Counter
T
75
CSR75
xxxx xxxx
Reserved
T
76
CSR76
xxxx xxxx
RCVRL: RCV Ring Length
S
77
CSR77
xxxx xxxx
Reserved
T
78
CSR78
xxxx xxxx
XMTRL: XMT Ring Length
S
79
CSR79
xxxx xxxx
Reserved
T
80
CSR80
xxxx E810
Burst and FIFO Threshold Control
S
81
CSR81
xxxx xxxx
Reserved
T
82
CSR82
xxxx 0000
DMABAT: Bus Acitivty Timer
S
83
CSR83
xxxx xxxx
Reserved
T
84
CSR84
xxxx xxxx
DMABA: DMA Address Lower
T
85
CSR85
xxxx xxxx
DMABA: DMA Address Upper
T
86
CSR86
xxxx xxxx
DMABC: Buffer Byte Counter
T
87
CSR87
xxxx xxxx
Reserved
T
88
CSR88
0243 0003
Chip ID Lower
T
89
CSR89
xxxx 0243
Chip ID Upper
T
90
CSR90
xxxx xxxx
Reserved
T
91
CSR91
xxxx xxxx
Reserved
T
92
CSR92
xxxx xxxx
RCON: Ring Length Conversion
T
93
CSR93
xxxx xxxx
Reserved
T
94
CSR94
xxxx 0000
XMTTDR: Transmit Time Domain Reflectometry Count
T
95
CSR95
xxxx xxxx
Reserved
T
96
CSR96
xxxx xxxx
SCR0: BIU Scratch Register 0 Lower
T
97
CSR97
xxxx xxxx
SCR0: BIU Scratch Register 0 Upper
T
98
CSR98
xxxx xxxx
SCR1: BIU Scratch Register 1 Lower
T
99
CSR99
xxxx xxxx
SCR1: BIU Scratch Register 1 Upper
T
100
CSR100
xxxx 0200
Bus Time-Out
S
101
CSR101
xxxx xxxx
Reserved
T
102
CSR102
xxxx xxxx
Reserved
T
103
CSR103
xxxx 0105
Reserved
T
104
CSR104
xxxx xxxx
SWAP: Swap Register Lower
T
105
CSR105
xxxx xxxx
SWAP: Swap Register Upper
T
106
CSR106
xxxx xxxx
Reserved
T
107
CSR107
xxxx xxxx
Reserved
T
108
CSR108
xxxx xxxx
BMSCR: BMU Scratch Register Lower
T
109
CSR109
xxxx xxxx
BMSCR: BMU Scratch Register Upper
T
Key:
x = undefined
R = Running Register S = Setup Register T = Test Register
Am79C965A
181