AM79C976 Datasheet, PDF (1/309 Pages) Advanced Micro Devices – PCnet-PRO™ 10/100 Mbps PCI Ethernet Controller

PRELIMINARY
Am79C976
PCnet-PRO™
10/100 Mbps PCI Ethernet Controller
DISTINCTIVE CHARACTERISTICS
s Integrated Fast Ethernet controller for the
Peripheral Component Interconnect (PCI) bus
— 32-bit glueless PCI host interface
— Supports PCI clock frequency from DC to
33 MHz independent of network clock
— Supports network operation with PCI clock
from 15 MHz to 33 MHz
— High performance bus mastering
architecture with integrated Direct Memory
Access (DMA) Buffer Management Unit for
low CPU and bus utilization
— PCI specification revision 2.2 compliant
— Supports PCI Subsystem/Subvendor
ID/Vendor ID programming through the
EEPROM interface
— Supports both PCI 3.3-V and 5.0-V signaling
environments
— Plug and Play compatible
— Uses advanced PCI commands (MWI, MRL,
MRM)
— Optionally supports PCI bursts aligned to
cache line boundaries
— Supports big endian and little endian byte
alignments
— Implements optional PCI power management
event (PME) pin
— Supports 40-bit addressing (using PCI Dual
Address Cycles)
s Media Independent Interface (MII) for
connecting external 10/100 megabit per second
(Mbps) transceivers
— IEEE 802.3-compliant MII
— Intelligent Auto-Poll™ external PHY status
monitor and interrupt
— Supports both auto-negotiable and non auto-
negotiable external PHYs
— Supports 10BASE-T, 100BASE-TX/FX,
100BASE-T4, and 100BASE-T2 IEEE 802.3-
compliant MII PHYs at full- or half-duplex
s Full-duplex operation supported with
independent Transmit (TX) and Receive (RX)
channels
s Includes support for IEEE 802.1Q VLANs
— Automatically inserts, deletes, or modifies
VLAN tag
— Optionally filters untagged frames
s Provides optional flow control features
— Recognizes and transmits IEEE 802.3x MAC
flow control frames
— Asserts collision-based back pressure in
half-duplex mode
s Provides internal Management Information
Base (MIB) counters for network statistics
s Supports PC97, PC98, PC99, and Net PC
requirements
— Implements full OnNow features including
pattern matching and link status wake-up
— Implements Magic Packet™ mode
— Magic Packet mode and the physical address
loaded from EEPROM at power up without
requiring PCI clock
— Supports PCI Bus Power Management
Interface Specification Version 1.1
— Supports Advanced Configuration and
Power Interface (ACPI) Specification Version
1.0
— Supports Network Device Class Power
Management Specification Version 1.0
s Large independent external TX and RX FIFOs
— Supports up to 4 megabytes (Mbytes)
external SSRAM for RX and TX frame storage
— Programmable FIFO watermarks for both
transmit and receive operations
— Receive frame queuing for high latency PCI
bus host operation
— Programmable allocation of buffer space
between transmit and receive queues
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 22929 Rev: C Amendment/0
Issue Date: August 2000
Refer to AMD’s Website (www.amd.com) for the latest information.