PC28F256P30TFA Datasheet, PDF (88/95 Pages) Micron Technology – Micron Parallel NOR Flash Embedded Memory (P30-65nm)

256Mb and 512Mb (256Mb/256Mb), P30-65nm
AC Read Specifications
Figure 35: Synchronous Burst Mode 4-Word Read
t_AVCH
t_VLCH t_CHAX
Latency count
CLK
A
ADV#
CE#
OE#
t_AVVH
A
t_VHVL
t_ELVH
t_ELCH
t_AVQV
t_VHAX
t_ELQV
t_ELQV
t_CHTX
t_GLTV
t_CHTV
t_CHTX
WAIT
DQ
t_GLQV
t_GLQX
t_CHQV
t_CHQV
t_CHQX
t_CHQX
Q0
Q1
Q2
Q3
Note: 1. WAIT is driven per OE# assertion during synchronous array or non-array read. WAIT as-
serted during initial latency and deasserted during valid data (RCR.10 = 0, WAIT asserted
low).
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. A 1/13 EN
88
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