PC28F256P30TFA Datasheet, PDF (76/95 Pages) Micron Technology – Micron Parallel NOR Flash Embedded Memory (P30-65nm)

256Mb and 512Mb (256Mb/256Mb), P30-65nm
Power Supply Decoupling
Figure 26: Reset Operation Waveforms
(A) Reset during
read mode
RST# ^VIH
V_IL
(B) Reset during
program or block erase
P1 £ P2
RST# ^VIH
V_IL
(C) Reset during
program or block erase
P1 ³ P2
RST# ^VIH
V_IL
(D) V_CC power-up to
RST# HIGH
V_CC
V_CC
0V
t_PLPH
t_PHQV
t_PLRH
Abort
complete
t_PHQV
t_{PLRH Abort}
complete
t_PHQV
t_VCCPH
Power Supply Decoupling
Flash memory devices require careful power supply de-coupling. Three basic power
supply current considerations are 1) standby current levels, 2) active current levels, and
3) transient peaks produced when CE# and OE# are asserted and deasserted.
When the device is accessed, many internal conditions change. Circuits within the de-
vice enable charge-pumps, and internal logic states change at high speed. All of these
internal activities produce transient signals. Transient current magnitudes depend on
the device outputs’ capacitive and inductive loading. Two-line control and correct de-
coupling capacitor selection suppress transient voltage peaks.
Because flash memory devices draw their power from VCC, VPP, and VCCQ, each power
connection should have a 0.1 µF ceramic capacitor to ground. High-frequency, inher-
ently low-inductance capacitors should be placed as close as possible to package leads.
Additionally, for every eight devices used in the system, a 4.7 µF electrolytic capacitor
should be placed between power and ground close to the devices. The bulk capacitor is
meant to overcome voltage droop caused by PCB trace inductance.
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. A 1/13 EN
76
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