EPXA1 Datasheet, PDF (7/16 Pages) Altera Corporation – Excalibur Device Overview

Figure 3. ARM922T Embedded Processor Internal Organization
IPA(31..0)
Excalibur Device Overview
Instruction
MMU
Instruction
Cache
(8 Kbyte)
C13
IVA(31..0)
JTAG
ARM9TDMI
Processor Core
(+ Embedded ICE
Interface)
DVA(31..0)
C13
IMVA(31..0)
ID(31..0)
DD(31..0)
DMVA(31..0)
Data MMU
Data Cache
(8 Kbyte)
Embedded
Trace
Module
Write
Data
Buffer
AMBA
Bus
Interface
AHB
Write-Back
Page
Address
TAG RAM
WBPA(31..0)
C13 Context Identification Register
DPA(31..0)
Altera Corporation
Independent of PLD configuration, the embedded processor can
undertake the following activities:
I Boot from external memory
I Execute embedded software
I Communicate with the external world
I Run a real-time operating system
I Run interactive embedded software debugging sessions
I Configure/reconfigure the PLD
I Detect errors and restart/reboot/reconfigure the entire system
as necessary
The PLD can be configured to implement various extensions:
I Additional soft-core peripherals such as a UART, Ethernet
MAC, CAN controllers, PCI, or any other IP core
I Peripherals that are bus masters, sharing the embedded stripe
on-chip and off-chip memories as well as other PLD peripheral
I Peripherals that are slaves, controlled by the embedded
processor
7