ACEX1K_03 Datasheet, PDF (58/86 Pages) Altera Corporation – Programmable Logic Device Family

ACEX 1K Programmable Logic Device Family Data Sheet
Table 26. Interconnect Timing Microparameters Note (1)
Symbol
Parameter
Conditions
t_DIN2IOE
t_DIN2LE
t_DIN2DATA
t_DCLK2IOE
t_DCLK2LE
t_SAMELAB
t_SAMEROW
t_SAMECOLUMN
t_DIFFROW
t_TWOROWS
t_LEPERIPH
t_LABCARRY
t_LABCASC
Delay from dedicated input pin to IOE control input
(7)
Delay from dedicated input pin to LE or EAB control input
(7)
Delay from dedicated input or clock to LE or EAB data
(7)
Delay from dedicated clock pin to IOE clock
(7)
Delay from dedicated clock pin to LE or EAB clock
(7)
Routing delay for an LE driving another LE in the same LAB
(7)
Routing delay for a row IOE, LE, or EAB driving a row IOE, LE, or EAB in the (7)
same row
Routing delay for an LE driving an IOE in the same column
(7)
Routing delay for a column IOE, LE, or EAB driving an LE or EAB in a different (7)
row
Routing delay for a row IOE or EAB driving an LE or EAB in a different row (7)
Routing delay for an LE driving a control signal of an IOE via the peripheral (7)
control bus
Routing delay for the carry-out signal of an LE driving the carry-in signal of a
different LE in a different LAB
Routing delay for the cascade-out signal of an LE driving the cascade-in
signal of a different LE in a different LAB
Notes to tables:
(1) Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2) Operating conditions: V_CCIO = 3.3 V ± 10% for commercial or industrial and extended use in ACEX 1K devices
(3) Operating conditions: V_CCIO = 2.5 V ± 5% for commercial or industrial and extended use in ACEX 1K devices.
(4) Operating conditions: V_CCIO = 2.5 V or 3.3 V.
(5) Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered.
(6) EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7) These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
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