ACEX1K_03 Datasheet, PDF (48/86 Pages) Altera Corporation – Programmable Logic Device Family

ACEX 1K Programmable Logic Device Family Data Sheet
Table 21. ACEX 1K Device Capacitance Note (14)
Symbol
Parameter
Conditions
Min
Max Unit
C_IN
C_INCLK
Input capacitance
Input capacitance on
dedicated clock pin
V_IN = 0 V, f = 1.0 MHz
V_IN = 0 V, f = 1.0 MHz
10
pF
12
pF
C_OUT Output capacitance
V_OUT = 0 V, f = 1.0 MHz
10
pF
Notes to tables:
(1) See the Operating Requirements for Altera Devices Data Sheet.
(2) Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3) Numbers in parentheses are for industrial- and extended-temperature-range devices.
(4) Maximum V_CC rise time is 100 ms, and V_CC must rise monotonically.
(5) All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before V_CCINT and V_CCIO are
powered.
(6) Typical values are for T_A = 25° C, V_CCINT = 2.5 V, and V_CCIO = 2.5 V or 3.3 V.
(7) These values are specified under the ACEX 1K Recommended Operating Conditions shown in Table 19 on page 46.
(8) The ACEX 1K input buffers are compatible with 2.5-V, 3.3-V (LVTTL and LVCMOS), and 5.0-V TTL and CMOS
signals. Additionally, the input buffers are 3.3-V PCI compliant when V_CCIO and V_CCINT meet the relationship
shown in Figure 22.
(9) The I_OH parameter refers to high-level TTL, PCI, or CMOS output current.
(10) The I_OL parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(11) This value is specified for normal device operation. The value may vary during power-up.
(12) This parameter applies to -1 speed grade commercial temperature devices and -2 speed grade industrial and
extended temperature devices.
(13) Pin pull-up resistance values will be lower if the pin is driven higher than V_CCIO by an external source.
(14) Capacitance is sample-tested only.
48
Altera Corporation