EPF10K50RC240-3 Datasheet, PDF (57/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Figures 25 through 27 show the delays that correspond to various paths
and functions within the LE, IOE, and EAB timing models.
Figure 25. FLEX 10K Device LE Timing Model
Carry-In
Cascade-In
Data-In
Control-In
LUT Delay
t_LUT
t_RLUT
t_CLUT
Packed Register
Delay
t_PACKED
Register Control
Delay
t_C
t_EN
Carry Chain
Delay
t_CGENR
t_CGEN
t_CICO
t_LABCARRY
Carry-Out
Register
Delays
t_CO
t_COMB
t_SU
t_H
t_PRE
t_CLR
t_CASC
t_LABCASC
Cascade-Out
Data-Out
Altera Corporation
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