EPF10K50RC240-3 Datasheet, PDF (113/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 103. EPF10K100A Device Interconnect Timing Microparameters Note (1)
Symbol
t_DIN2IOE
t_DIN2LE
t_DIN2DATA
t_DCLK2IOE
t_DCLK2LE
t_SAMELAB
t_SAMEROW
t_SAMECOLUMN
t_DIFFROW
t_TWOROWS
t_LEPERIPH
t_LABCARRY
t_LABCASC
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
4.8
5.4
6.0
ns
2.0
2.4
2.7
ns
2.4
2.7
2.9
ns
2.6
3.0
3.5
ns
2.0
2.4
2.7
ns
0.1
0.1
0.1
ns
1.5
1.7
1.9
ns
5.5
6.5
7.4
ns
7.0
8.2
9.3
ns
8.5
9.9
11.2
ns
3.9
4.2
4.5
ns
0.2
0.2
0.3
ns
0.4
0.5
0.6
ns
Table 104. EPF10K100A Device External Timing Parameters Note (1)
Symbol
t_DRR
t_INSU (2), (3)
t_INH (3)
t_OUTCO (3)
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
12.5
14.5
17.0
ns
3.7
4.5
5.1
ns
0.0
0.0
0.0
ns
2.0
5.3
2.0
6.1
2.0
7.2
ns
Table 105. EPF10K100A Device External Bidirectional Timing Parameters Note (1)
Symbol
t_INSUBIDIR
t_INHBIDIR
t_OUTCOBIDIR
t_XZBIDIR
t_ZXBIDIR
-1 Speed Grade
Min
Max
4.9
0.0
2.0
5.3
7.4
7.4
-2 Speed Grade
Min
Max
5.8
0.0
2.0
6.1
8.6
8.6
-3 Speed Grade
Unit
Min
Max
6.8
ns
0.0
ns
2.0
7.2
ns
10.1
ns
10.1
ns
Altera Corporation
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