EPF10K50RC240-3 Datasheet, PDF (13/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Logic Array Block
Each LAB consists of eight LEs, their associated carry and cascade chains,
LAB control signals, and the LAB local interconnect. The LAB provides
the coarse-grained structure to the FLEX 10K architecture, facilitating
efficient routing with optimum device utilization and high performance.
See Figure 5.
Figure 5. FLEX 10K LAB
Dedicated Inputs &
Global Signals
Row Interconnect
LAB Local
Interconnect (2)
LAB Control
Signals
(1)
4
4
4
4
4
4
4
4
4
6
Carry-In &
Cascade-In
2
4
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
16
4
8 24
8
16
See Figure 11
for details.
Column-to-Row
Interconnect
Column
Interconnect
8
2 _{Carry-Out &}
Cascade-Out
Notes:
(1) EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
22 inputs to the LAB local interconnect channel from the row; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V,
and EPF10K250A devices have 26.
(2) EPF10K10, EPF10K10A, EPF10K20, EPF10K30, EPF10K30A, EPF10K40, EPF10K50, and EPF10K50V devices have
30 LAB local interconnect channels; EPF10K70, EPF10K100, EPF10K100A, EPF10K130V, and EPF10K250A devices
have 34 LABs.
Altera Corporation
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