EN2342QI Datasheet, PDF (5/23 Pages) Altera Corporation – 4A PowerSoC Voltage Mode Synchronous PWM Buck with Integrated Inductor

EN2342QI
Electrical Characteristics
NOTE: V_IN=12V, Minimum and Maximum values are over operating ambient temperature range (-40°C ≤ T_A ≤ +85°C)
unless otherwise noted. Typical values are at T_A = 25°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Operating Input Voltage
PVIN
4.5
14.0
V
Controller Input Voltage
AVIN UVLO Rising
AVIN UVLO Falling
AVIN UVLO Hysteresis
AVIN Pin Input Current
Internal LDO Output
AVIN
AVIN_UVLOR
AVIN_OVLOF
AVIN_HYS
I_AVIN
AVINO
UVLO is not asserted
UVLO is asserted
2.5
5.5
V
2.5 2.75
3
V
2.1 2.35 2.6
V
400
mV
7
15
mA
3.3
V
Shut-Down Supply
Current
Feedback Pin Voltage
IPVIN_S PVIN=12V, AVIN=3.3V, ENABLE=0V
2
mA
IAVIN_S PVIN=12V, AVIN=3.3V, ENABLE=0V
300
µA
V_FB
VIN = 12V, I_LOAD = 0, TA = 25°C Only
0.742
5
0.750
0.7575
V
Feedback Pin Voltage
Feedback Pin Input
Leakage Current
V_FB
4.5V ≤ VIN ≤ 14V; 0A ≤ I_LOAD ≤ 4A
I_FB
VFB pin input leakage current
(Note 4)
0.735 0.750 0.765
V
-5
5
nA
V_OUT Rise Time
Soft-Start Capacitor
Range
t_RISE
C_{SS_RANGE}
C_SS = 47nF (Note 5 and Note 6)
3.2
ms
10
47
68
nF
Output Current Range
Over Current Trip Level
Short Circuit Average
Input Current
I_OUT
I_OCP
I_{IN_AVG_OCP}
PVIN=12V, V_OUT=1.2V
Short = 10mΩ (Note 7)
0
4
A
4.15
6
A
100
mA
Disable Threshold
ENABLE Threshold
ENABLE Hysteresis
ENABLE Lockout Time
ENABLE Input Current
Switching Frequency
External SYNC Clock
Frequency Lock Range
V_DISABLE ENABLE pin logic Low
0.0
0.95
V_ENABLE ENABLE pin logic High
1.25
AVIN
EN_HYS
200
T_ENLOCKOUT
8
I_ENABLE 370k internal pull-down (Note 4)
4
F_SW
R_FS =3kΩ
1.0
F_{PLL_LOCK}
Range of SYNC clock frequency (See
Table 1)
0.9
1.8
V
V
mV
ms
µA
MHz
MHz
S_IN Threshold – Low
V_{S_IN_LO} S_IN clock logic low level (Note 4)
0.8
V
S_IN Threshold – High
V_{S_IN_HI} S_IN clock logic high level (Note 4)
1.8
2.5
V
S_OUT Threshold – Low V_{S_OUT_LO} S_OUT clock logic low level (Note 4)
0.8
V
S_OUT Threshold – High V_{S_OUT_HI} S_OUT clock logic high level (Note 4) 1.8
2.5
V
POK Lower Threshold
POK_LT
V_OUT / V_{OUT_NOM}
90
%
POK Output low Voltage
V_POKL
With 4mA current sink into POK
0.4
V
POK Output Hi Voltage
V_POKH
PVIN range: 4.5V ≤ V_IN ≤ 14V
AVIN
V
POK V_OH Leakage
Current
I_POKL
POK High (Note 4)
1
µA
Note 4: Parameter not production tested but is guaranteed by design.
Note 5: Rise time calculation begins when AVIN > V_UVLO and ENABLE = HIGH.
www.altera.com/enpirion, Page 5
09520
February 21, 2014
Rev A