EPM7032AETI44-7N Datasheet, PDF (29/64 Pages) Altera Corporation – Programmable Logic Device Family

MAX 7000A Programmable Logic Device Data Sheet
Table 15. MAX 7000A Device DC Operating Conditions Note (6)
Symbol
Parameter
Conditions
Min
Max Unit
V_IH
High-level input voltage
V_IL
Low-level input voltage
V_OH 3.3-V high-level TTL output I_OH = –8 mA DC, V_CCIO = 3.00 V (7)
voltage
1.7
–0.5
2.4
5.75
V
0.8
V
V
3.3-V high-level CMOS output I_OH = –0.1 mA DC, V_CCIO = 3.00 V V_CCIO – 0.2
V
voltage
(7)
2.5-V high-level output voltage I_OH = –100 µA DC, V_CCIO = 2.30 V
2.1
V
(7)
I_OH = –1 mA DC, V_CCIO = 2.30 V (7)
2.0
I_OH = –2 mA DC, V_CCIO = 2.30 V (7)
1.7
V_OL
3.3-V low-level TTL output
I_OL = 8 mA DC, V_CCIO = 3.00 V (8)
voltage
V
V
0.45
V
3.3-V low-level CMOS output I_OL = 0.1 mA DC, V_CCIO = 3.00 V (8)
voltage
0.2
V
2.5-V low-level output voltage I_OL = 100 µA DC, V_CCIO = 2.30 V (8)
I_OL = 1 mA DC, V_CCIO = 2.30 V (8)
I_OL = 2 mA DC, V_CCIO = 2.30 V (8)
I_I
Input leakage current
V_I = –0.5 to 5.5 V (9)
–10
I_OZ
Tri-state output off-state
V_I = –0.5 to 5.5 V (9)
–10
current
0.2
V
0.4
V
0.7
V
10
µA
10
µA
R_ISP
Value of I/O pin pull-up resistor
during in-system programming
or during power-up
V_CCIO = 3.0 to 3.6 V (10)
V_CCIO = 2.3 to 2.7 V (10)
V_CCIO = 2.3 to 3.6 V (11)
20
50
kΩ
30
80
kΩ
20
74
kΩ
Table 16. MAX 7000A Device Capacitance Note (12)
Symbol
Parameter
C_IN
Input pin capacitance
C_I/O I/O pin capacitance
Conditions
V_IN = 0 V, f = 1.0 MHz
V_OUT = 0 V, f = 1.0 MHz
Min
Max Unit
8
pF
8
pF
Altera Corporation
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