ER3110DI Datasheet, PDF (18/23 Pages) Altera Corporation – Synchronous Buck Regulator

Page 18
such that it will not saturate in overcurrent conditions. For typical ER3110DI applications, inductor values generally
lies in the 10µH to 47µH range. In general, higher V_OUT will mean higher inductance.
Buck Regulator Output Capacitor Selection
An output capacitor is required to filter the inductor current. The current mode control loop allows the use of low ESR
ceramic capacitors and thus supports very small circuit implementations on the PC board. Electrolytic and polymer
capacitors may also be used.
While ceramic capacitors offer excellent overall performance and reliability, the actual in-circuit capacitance must be
considered. Ceramic capacitors are rated using large peak-to-peak voltage swings and with no DC bias. In the DC/DC
converter application, these conditions do not reflect reality. As a result, the actual capacitance may be considerably
lower than the advertised value. Consult the manufacturers data sheet to determine the actual in-application
capacitance. Most manufacturers publish capacitance vs DC bias so that this effect can be easily accommodated. The
effects of AC voltage are not frequently published, but an assumption of ~20% further reduction will generally suffice.
The result of these considerations may mean an effective capacitance 50% lower than nominal and this value should be
used in all design calculations. Nonetheless, ceramic capacitors are a very good choice in many applications due to
their reliability and extremely low ESR.
The following equations allow calculation of the required capacitance to meet a desired ripple voltage level.
Additional capacitance may be used.
For the ceramic capacitors (low ESR):
V_OUTripple= -8---_∗---F---_S----_W-^Δ---_∗-I---C---_O----_U---_T-
(EQ. 6)
where DI is the inductor’s peak-to-peak ripple current, F_SW is the switching frequency and C_OUT is the output
capacitor.
If using electrolytic capacitors then:
V_OUTripple= ΔI*ESR
(EQ. 7)
Loop Compensation Design
When COMP is not connected to AVINO, the COMP pin is active for external loop compensation. The ER3110DI uses
constant frequency peak current mode control architecture to achieve a fast loop transient response. An accurate
current sensing pilot device in parallel with the upper MOSFET is used for peak current control signal and overcurrent
protection. The inductor is not considered as a state variable since its peak current is constant, and the system becomes
a single order system. It is much easier to design a type II compensator to stabilize the loop than to implement voltage
mode control. Peak current mode control has an inherent input voltage feed-forward function to achieve good line
regulation. Figure 47 shows the small signal model of the synchronous buck regulator.
^iin
V^PVIN
+
^iL _LP
R_LP
ILd^ 1:D V_PVI^d_N^{^}
R_T
vo^
Rc
Ro
Co
d^
Ti(S)
K
Fm
+
He(S)
Tv(S)
V^{^}_{comp -Av(S)}
FIGURE 47. SMALL SIGNAL MODEL OF SYNCHRONOUS BUCK
REGULATOR
Enpirion Power Datasheet ER3110DI Wide PVIN 1A Synchronous Buck Regulator
10038
May 28, 2014
May 2014 Altera Corporation
Rev A